Incorporated Patents
This Application is related to U.S. Pat. Nos. 5,613,861 and 5,944,537, which are hereby incorporated by reference in their entirety. U.S. Pat. Nos. 5,665,648 and 3,842,189 are also hereby incorporated by reference in their entirety.
1. Field of Invention
This invention generally relates to interconnecting devices, such as integrated circuits, circuit boards, electrode arrays, or other devices.
2. Description of Related Art
As described in U.S. Pat. No. 5,613,861, standard bonding techniques for electrically connecting integrated circuits, or chips, to a circuit board or other device include wire bonding, tab bonding, solder-bump and gold-bump flip-chip bonding and other techniques. However, these standard bonding techniques suffer from various problems and limitations, including relatively low resistance to thermal and mechanical shock and being incapable of being made very small, e.g., allowing a contact pad pitch of several microns.